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Divide by 3 clock in 4 easy steps
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"Divide by 3 clock with 50% duty cycle" is the most commonly asked ASIC design question.
This solution gives a simple design in which only 1 counter is required which works only on positive edge of the clock.
In 4 easy steps, one will have a divide by 3 clock with 50% duty cycle.
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Solution Summary
"Divide by 3 clock with 50% duty cycle" is the most commonly asked ASIC design question.
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Divide by 3 the easy way
clk
1 0 1 0 1 0 1 0 1 0 1 0
Step 1 : Have a 2 bit counter counting 0, 1, 2 and ...
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